1. Field of the Invention
The present invention relates to switch architecture that requires fanout of ingress grains to multiple egress ports.
2. Description of the Prior Art
In the field of telecommunications, one of the most important constraints in designing telecommunication systems is that of power consumption. Telecommunication systems, embodied in printed circuit boards, typically have a maximum power budget of between 100 W and 120 W. The maximum allowable power is in part constrained by the ability to cool the system—the mean time before failure (MTBF) decreases with an increase in operating temperature. The MTBF is calculated as an average time interval, usually expressed in thousands of tens of thousands of hours, that a hardware component fails and requires service. Although many devices are often found on a printed circuit board, the switch fabric component often consumes the majority of the power. As power consumption will increase along with the switch capacity, it is important to reduce power consumption of the switching component to enable the design of large switching systems. Moreover, as power consumed by large switching system chips results in digital noise, the reduction in power consumption will result in the reduction of digital noise.
For large switching systems, time division multiplexing (TDM) is a technique to combine multiple data streams at a lower rate into a single higher rate signal, by separating the higher rate signal into N segments. The circuit component that combines signals at the source end of a communication link is known as a multiplexer. The multiplexer accepts the input from N lower rate signals, breaks each signal into segments, and assigns the segments to the higher rate signal in a rotating, repeating sequence. The frequency of the higher rate signal is N times the frequency of the lower rate signal. At the other end of the communication link, the individual lower rate signals are separated out by means of a circuit called a demultiplexer. The demultiplexer regenerates each lower rate signal by extracting one segment from every N segments of the higher rate signal. The same rotating, repeating sequence is used by the demultiplexer. A two-way communication link requires a multiplexer/demultiplexer at each end of the link.
The Synchronous Optical Network (SONET) and the Synchronous Digital Hierarchy (SDH) standards are two examples of systems which utilize TDM. In SONET, the base signal rate is 51.84 Mbps, referred to as the STS-1 signal. Forty-eight STS-1 signals are multiplexed to form an STS-48 signal and 192 STS-1 signals are multiplexed to form an STS-192 signal and so on. The SDH standard defines a similar signal hierarchy.
It is well known in the field of telecommunications that TDM switches are used to cross-connect lower rate signals contained within a higher rate signal. The lower rate signal will be hereinafter referred to as a grain. The collection of lower rate signals, grains, that form a higher rate signal is referred to as a grain group. A grain group is therefore composed of a fixed number of grains.
The following publication, incorporated herein by reference, is a snapshot of the current state of the art in switching architectures: J. Hui, Switching and Traffic Theory for Integrated Broadband Networks, Kluwer Academic Publishers, 1990. The Hui reference discusses the crosspoint complexity and power consumption related to the crosspoint count in Very Large Scale Integration (VLSI) chips having switch components. A crosspoint is defined as the connection between two pins in a given chip. Hui notes that VLSI chips in general have limitations related to the number of pins per chip and the fan-in and fan-out capability of each pin. Accordingly, the crosspoint point count in switch components is also limited. While the Hui reference discusses multiple-stage switching networks as a possible solution to minimizing the crosspoint count, there is no discussion of disabling the propagation of data along a given crosspoint path. In further discussion, Hui defines switching networks as non-blocking networks. A non-blocking network ensures that there is always a free crosspoint path available for any connection required. In a non-blocking network, the connections are made without disturbing existing connections. However, Hui notes that, as data traffic patterns are ever-changing, the management of non-blockings networks is complex. Also, the cost of changing the topology of the switch connections may be costly.
Another problem in the art is that the amount of power consumed by the switch component is directly related to an increase in crosspoint counts. Thus, there is a need in the art to provide a switch architecture which has a power management functionality. Furthermore, the power consumed will vary with the data propagating through the switch. A power spike, and therefore current spike, will occur when the datapath transitions from a state where constant data is propagating to a state where the majority of the data toggles to a new value. There is a need in the art to reduce the average power consumption and reduce the maximum number of data transition to reduce the amplitude of current spikes.
One switch architecture is an egress selection switch (ESS) block architecture. The ESS architecture is composed of one ESS block for each egress port. The ESS switch architecture is an output buffered memory switch. An output memory buffered switch, known in the art, resolves contention fro egress ports by connecting each ingress port to every egress port. Each egress port then selects and stores only the data of interest for subsequent output. The power consumption of an ESS architecture, and similar switch architectures, is dominated by the toggling of the wires and the connections required to transmit data from each ingress port to every egress port. Such systems are power inefficient as each egress port receives data from all N ingress ports but selects at most 1/Nth of the data for output.
In the prior art, a constant overwrite method for integrated circuits is taught in U.S. Pat. No. 4,724,340, issued to Sood. However, the Sood patent does not provide a method of data overwriting that is applied to signals internal to a data switch.
In view of the above-noted shortcomings, the present invention seeks to provide apparatus in a plurality of embodiments for reducing the level of power consumption and the amount of switching noise induced in the digital logic of a time division multiplexed memory switch. The present invention further seeks to provide a switch having a data disable block to minimize toggle of wires and logic used to fanout ingress grains to egress ports.